| 1 |
hedin |
82 |
[p AUTOSTATIC LARGE_MODEL SMALL_DATA LFSROK EMI_WORD ]
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| 2 |
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"19 C:\Programmer\HI-TECH Software\PICC-18\9.50\include\errata.h
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[e E1 .
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ERRATA_4000 1
|
| 5 |
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ERRATA_FASTINTS 2
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| 6 |
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ERRATA_LFSR 4
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| 7 |
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ERRATA_MINUS40 8
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| 8 |
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ERRATA_RESET 16
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| 9 |
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ERRATA_BSR15 32
|
| 10 |
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ERRATA_DAW 64
|
| 11 |
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ERRATA_EEDATARD 128
|
| 12 |
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ERRATA_EEADR 256
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| 13 |
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ERRATA_EE_LVD 512
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| 14 |
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ERRATA_FL_LVD 1024
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| 15 |
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ERRATA_TBLWTINT 2048
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| 16 |
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ERRATA_FW4000 4096
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| 17 |
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ERRATA_RESETRAM 8192
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| 18 |
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]
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| 19 |
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"21 C:\Programmer\HI-TECH Software\PICC-18\9.50\include\pic18fxx2.h
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[v _TOSU `VNuc 1 s 1 @4095 ]
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"22
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[v _TOSH `VNuc 1 s 1 @4094 ]
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"23
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[v _TOSL `VNuc 1 s 1 @4093 ]
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"24
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[v _STKPTR `VNuc 1 s 1 @4092 ]
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"25
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[v _PCLATU `VNuc 1 s 1 @4091 ]
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"26
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[v _PCLATH `VNuc 1 s 1 @4090 ]
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"27
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[v _PCL `VNuc 1 s 1 @4089 ]
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"28
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[v _TBLPTR `*VFuc 1 s 2 @4086 ]
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"29
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[v _TBLPTRU `VNuc 1 s 1 @4088 ]
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[v _TBLPTRH `VNuc 1 s 1 @4087 ]
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"31
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[v _TBLPTRL `VNuc 1 s 1 @4086 ]
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"32
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[v _TABLAT `VNuc 1 s 1 @4085 ]
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"33
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[v _PRODH `VNuc 1 s 1 @4084 ]
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"34
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[v _PRODL `VNuc 1 s 1 @4083 ]
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"35
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[v _INTCON `VNuc 1 s 1 @4082 ]
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"36
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[v _INTCON2 `Nuc 1 s 1 @4081 ]
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"37
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[v _INTCON3 `VNuc 1 s 1 @4080 ]
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"38
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[v _INDF0 `VNuc 1 s 1 @4079 ]
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"39
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[v _POSTINC0 `VNuc 1 s 1 @4078 ]
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"40
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[v _POSTDEC0 `VNuc 1 s 1 @4077 ]
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"41
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[v _PREINC0 `VNuc 1 s 1 @4076 ]
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"42
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[v _PLUSW0 `VNuc 1 s 1 @4075 ]
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"43
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[v _FSR0H `VNuc 1 s 1 @4074 ]
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"44
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[v _FSR0L `VNuc 1 s 1 @4073 ]
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"45
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[v _WREG `VNuc 1 s 1 @4072 ]
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"46
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[v _INDF1 `VNuc 1 s 1 @4071 ]
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"47
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[v _POSTINC1 `VNuc 1 s 1 @4070 ]
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"48
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[v _POSTDEC1 `VNuc 1 s 1 @4069 ]
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"49
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[v _PREINC1 `VNuc 1 s 1 @4068 ]
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"50
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[v _PLUSW1 `VNuc 1 s 1 @4067 ]
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"51
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[v _FSR1H `VNuc 1 s 1 @4066 ]
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"52
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[v _FSR1L `VNuc 1 s 1 @4065 ]
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"53
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[v _BSR `Nuc 1 s 1 @4064 ]
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"54
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[v _INDF2 `VNuc 1 s 1 @4063 ]
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"55
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[v _POSTINC2 `VNuc 1 s 1 @4062 ]
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"56
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[v _POSTDEC2 `VNuc 1 s 1 @4061 ]
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"57
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[v _PREINC2 `VNuc 1 s 1 @4060 ]
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"58
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[v _PLUSW2 `VNuc 1 s 1 @4059 ]
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"59
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[v _FSR2H `VNuc 1 s 1 @4058 ]
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"60
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[v _FSR2L `VNuc 1 s 1 @4057 ]
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"61
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[v _STATUS `VNuc 1 s 1 @4056 ]
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"62
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[v _TMR0 `VNui 1 s 2 @4054 ]
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"63
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[v _TMR0H `VNuc 1 s 1 @4055 ]
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"64
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[v _TMR0L `VNuc 1 s 1 @4054 ]
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"65
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[v _T0CON `Nuc 1 s 1 @4053 ]
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"66
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[v _OSCCON `VNuc 1 s 1 @4051 ]
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"67
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[v _LVDCON `VNuc 1 s 1 @4050 ]
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"68
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[v _WDTCON `Nuc 1 s 1 @4049 ]
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"69
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[v _RCON `VNuc 1 s 1 @4048 ]
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"70
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[v _TMR1 `VNui 1 s 2 @4046 ]
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"71
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[v _TMR1H `VNuc 1 s 1 @4047 ]
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"72
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[v _TMR1L `VNuc 1 s 1 @4046 ]
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"73
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[v _T1CON `Nuc 1 s 1 @4045 ]
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"74
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[v _TMR2 `VNuc 1 s 1 @4044 ]
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"75
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[v _PR2 `VNuc 1 s 1 @4043 ]
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"76
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[v _T2CON `Nuc 1 s 1 @4042 ]
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"77
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[v _SSPBUF `VNuc 1 s 1 @4041 ]
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"78
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[v _SSPADD `VNuc 1 s 1 @4040 ]
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"79
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[v _SSPSTAT `VNuc 1 s 1 @4039 ]
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"80
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[v _SSPCON1 `VNuc 1 s 1 @4038 ]
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"81
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[v _SSPCON2 `VNuc 1 s 1 @4037 ]
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"82
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[v _ADRES `VNui 1 s 2 @4035 ]
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"83
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[v _ADRESH `VNuc 1 s 1 @4036 ]
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"84
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[v _ADRESL `VNuc 1 s 1 @4035 ]
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"85
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[v _ADCON0 `VNuc 1 s 1 @4034 ]
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"86
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[v _ADCON1 `Nuc 1 s 1 @4033 ]
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"87
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[v _CCPR1 `VNui 1 s 2 @4030 ]
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"88
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[v _CCPR1H `VNuc 1 s 1 @4031 ]
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"89
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[v _CCPR1L `VNuc 1 s 1 @4030 ]
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"90
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[v _CCP1CON `VNuc 1 s 1 @4029 ]
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"91
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[v _CCPR2 `VNui 1 s 2 @4027 ]
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"92
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[v _CCPR2H `VNuc 1 s 1 @4028 ]
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"93
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[v _CCPR2L `VNuc 1 s 1 @4027 ]
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"94
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[v _CCP2CON `VNuc 1 s 1 @4026 ]
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"95
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[v _TMR3 `VNui 1 s 2 @4018 ]
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"96
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[v _TMR3H `VNuc 1 s 1 @4019 ]
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"97
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[v _TMR3L `VNuc 1 s 1 @4018 ]
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"98
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[v _T3CON `Nuc 1 s 1 @4017 ]
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"99
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[v _SPBRG `Nuc 1 s 1 @4015 ]
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"100
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[v _RCREG `VNuc 1 s 1 @4014 ]
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"101
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[v _TXREG `VNuc 1 s 1 @4013 ]
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"102
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[v _TXSTA `VNuc 1 s 1 @4012 ]
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"103
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[v _RCSTA `VNuc 1 s 1 @4011 ]
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"104
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[v _EEADR `VNuc 1 s 1 @4009 ]
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"105
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[v _EEDATA `VNuc 1 s 1 @4008 ]
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"106
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[v _EECON2 `VNuc 1 s 1 @4007 ]
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"107
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[v _EECON1 `VNuc 1 s 1 @4006 ]
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"108
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[v _IPR2 `Nuc 1 s 1 @4002 ]
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"109
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[v _PIR2 `VNuc 1 s 1 @4001 ]
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"110
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[v _PIE2 `Nuc 1 s 1 @4000 ]
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"111
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[v _IPR1 `Nuc 1 s 1 @3999 ]
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"112
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[v _PIR1 `VNuc 1 s 1 @3998 ]
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"113
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[v _PIE1 `Nuc 1 s 1 @3997 ]
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"114
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[v _TRISC `VNuc 1 s 1 @3988 ]
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"115
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[v _TRISB `VNuc 1 s 1 @3987 ]
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"116
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[v _TRISA `VNuc 1 s 1 @3986 ]
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"117
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[v _LATC `VNuc 1 s 1 @3979 ]
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"118
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[v _LATB `VNuc 1 s 1 @3978 ]
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"119
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[v _LATA `VNuc 1 s 1 @3977 ]
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"120
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[v _PORTC `VNuc 1 s 1 @3970 ]
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"121
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[v _PORTB `VNuc 1 s 1 @3969 ]
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"122
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[v _PORTA `VNuc 1 s 1 @3968 ]
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"124
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[v _TRISE `VNuc 1 s 1 @3990 ]
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"125
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[v _TRISD `VNuc 1 s 1 @3989 ]
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"126
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[v _LATE `VNuc 1 s 1 @3981 ]
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"127
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[v _LATD `VNuc 1 s 1 @3980 ]
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"128
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[v _PORTE `VNuc 1 s 1 @3972 ]
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"129
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[v _PORTD `VNuc 1 s 1 @3971 ]
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"134
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[v _NEGATIVE `VNb 1 s 0 @32452 ]
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"135
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[v _OVERFLOW `VNb 1 s 0 @32451 ]
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"136
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[v _ZERO `VNb 1 s 0 @32450 ]
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[v _DC `VNb 1 s 0 @32449 ]
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"138
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[v _CARRY `VNb 1 s 0 @32448 ]
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"141
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[v _STKFUL `VNb 1 s 0 @32743 ]
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"142
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[v _STKUNF `VNb 1 s 0 @32742 ]
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"143
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[v _SP4 `VNb 1 s 0 @32740 ]
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"144
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[v _SP3 `VNb 1 s 0 @32739 ]
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"145
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[v _SP2 `VNb 1 s 0 @32738 ]
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"146
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[v _SP1 `VNb 1 s 0 @32737 ]
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"147
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[v _SP0 `VNb 1 s 0 @32736 ]
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"150
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[v _GIE `Nb 1 s 0 @32663 ]
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[v _GIEH `Nb 1 s 0 @32663 ]
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[v _PEIE `Nb 1 s 0 @32662 ]
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[v _GIEL `Nb 1 s 0 @32662 ]
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[v _TMR0IE `Nb 1 s 0 @32661 ]
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"155
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[v _INT0IE `Nb 1 s 0 @32660 ]
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[v _RBIE `Nb 1 s 0 @32659 ]
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[v _TMR0IF `VNb 1 s 0 @32658 ]
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[v _INT0IF `VNb 1 s 0 @32657 ]
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[v _RBIF `VNb 1 s 0 @32656 ]
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[v _T0IF `VNb 1 s 0 @32658 ]
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[v _RBPU `Nb 1 s 0 @32655 ]
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[v _INTEDG0 `Nb 1 s 0 @32654 ]
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[v _INTEDG1 `Nb 1 s 0 @32653 ]
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[v _INTEDG2 `Nb 1 s 0 @32652 ]
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[v _TMR0IP `Nb 1 s 0 @32650 ]
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[v _RBIP `Nb 1 s 0 @32648 ]
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[v _T0IP `Nb 1 s 0 @32650 ]
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[v _INT2IP `Nb 1 s 0 @32647 ]
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[v _INT1IP `Nb 1 s 0 @32646 ]
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[v _INT2IE `Nb 1 s 0 @32644 ]
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[v _INT1IE `Nb 1 s 0 @32643 ]
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[v _INT2IF `VNb 1 s 0 @32641 ]
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[v _INT1IF `VNb 1 s 0 @32640 ]
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"180
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[v _TMR0ON `Nb 1 s 0 @32431 ]
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[v _T08BIT `Nb 1 s 0 @32430 ]
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[v _T0CS `Nb 1 s 0 @32429 ]
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[v _T0SE `Nb 1 s 0 @32428 ]
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[v _PSA `Nb 1 s 0 @32427 ]
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[v _T0PS2 `Nb 1 s 0 @32426 ]
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[v _T0PS1 `Nb 1 s 0 @32425 ]
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[v _T0PS0 `Nb 1 s 0 @32424 ]
|
| 323 |
|
|
"190
|
| 324 |
|
|
[v _SCS `Nb 1 s 0 @32408 ]
|
| 325 |
|
|
"193
|
| 326 |
|
|
[v _IRVST `VNb 1 s 0 @32405 ]
|
| 327 |
|
|
"194
|
| 328 |
|
|
[v _LVDEN `Nb 1 s 0 @32404 ]
|
| 329 |
|
|
"195
|
| 330 |
|
|
[v _LVDL3 `Nb 1 s 0 @32403 ]
|
| 331 |
|
|
"196
|
| 332 |
|
|
[v _LVDL2 `Nb 1 s 0 @32402 ]
|
| 333 |
|
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"197
|
| 334 |
|
|
[v _LVDL1 `Nb 1 s 0 @32401 ]
|
| 335 |
|
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"198
|
| 336 |
|
|
[v _LVDL0 `Nb 1 s 0 @32400 ]
|
| 337 |
|
|
"201
|
| 338 |
|
|
[v _SWDTEN `Nb 1 s 0 @32392 ]
|
| 339 |
|
|
"204
|
| 340 |
|
|
[v _IPEN `Nb 1 s 0 @32391 ]
|
| 341 |
|
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"205
|
| 342 |
|
|
[v _RI `VNb 1 s 0 @32388 ]
|
| 343 |
|
|
"206
|
| 344 |
|
|
[v _TO `VNb 1 s 0 @32387 ]
|
| 345 |
|
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"207
|
| 346 |
|
|
[v _PD `VNb 1 s 0 @32386 ]
|
| 347 |
|
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"208
|
| 348 |
|
|
[v _POR `VNb 1 s 0 @32385 ]
|
| 349 |
|
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"209
|
| 350 |
|
|
[v _BOR `VNb 1 s 0 @32384 ]
|
| 351 |
|
|
"212
|
| 352 |
|
|
[v _RD16 `Nb 1 s 0 @32367 ]
|
| 353 |
|
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"213
|
| 354 |
|
|
[v _T1RD16 `Nb 1 s 0 @32367 ]
|
| 355 |
|
|
"214
|
| 356 |
|
|
[v _T1CKPS1 `Nb 1 s 0 @32365 ]
|
| 357 |
|
|
"215
|
| 358 |
|
|
[v _T1CKPS0 `Nb 1 s 0 @32364 ]
|
| 359 |
|
|
"216
|
| 360 |
|
|
[v _T1OSCEN `Nb 1 s 0 @32363 ]
|
| 361 |
|
|
"217
|
| 362 |
|
|
[v _T1SYNC `Nb 1 s 0 @32362 ]
|
| 363 |
|
|
"218
|
| 364 |
|
|
[v _TMR1CS `Nb 1 s 0 @32361 ]
|
| 365 |
|
|
"219
|
| 366 |
|
|
[v _TMR1ON `Nb 1 s 0 @32360 ]
|
| 367 |
|
|
"222
|
| 368 |
|
|
[v _TOUTPS3 `Nb 1 s 0 @32342 ]
|
| 369 |
|
|
"223
|
| 370 |
|
|
[v _TOUTPS2 `Nb 1 s 0 @32341 ]
|
| 371 |
|
|
"224
|
| 372 |
|
|
[v _TOUTPS1 `Nb 1 s 0 @32340 ]
|
| 373 |
|
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"225
|
| 374 |
|
|
[v _TOUTPS0 `Nb 1 s 0 @32339 ]
|
| 375 |
|
|
"226
|
| 376 |
|
|
[v _TMR2ON `Nb 1 s 0 @32338 ]
|
| 377 |
|
|
"227
|
| 378 |
|
|
[v _T2CKPS1 `Nb 1 s 0 @32337 ]
|
| 379 |
|
|
"228
|
| 380 |
|
|
[v _T2CKPS0 `Nb 1 s 0 @32336 ]
|
| 381 |
|
|
"231
|
| 382 |
|
|
[v _SMP `Nb 1 s 0 @32319 ]
|
| 383 |
|
|
"232
|
| 384 |
|
|
[v _CKE `Nb 1 s 0 @32318 ]
|
| 385 |
|
|
"233
|
| 386 |
|
|
[v _DA `VNb 1 s 0 @32317 ]
|
| 387 |
|
|
"234
|
| 388 |
|
|
[v _P `VNb 1 s 0 @32316 ]
|
| 389 |
|
|
"235
|
| 390 |
|
|
[v _S `VNb 1 s 0 @32315 ]
|
| 391 |
|
|
"236
|
| 392 |
|
|
[v _RW `VNb 1 s 0 @32314 ]
|
| 393 |
|
|
"237
|
| 394 |
|
|
[v _UA `VNb 1 s 0 @32313 ]
|
| 395 |
|
|
"238
|
| 396 |
|
|
[v _BF `VNb 1 s 0 @32312 ]
|
| 397 |
|
|
"240
|
| 398 |
|
|
[v _STOP `VNb 1 s 0 @32316 ]
|
| 399 |
|
|
"241
|
| 400 |
|
|
[v _START `VNb 1 s 0 @32315 ]
|
| 401 |
|
|
"244
|
| 402 |
|
|
[v _WCOL `VNb 1 s 0 @32311 ]
|
| 403 |
|
|
"245
|
| 404 |
|
|
[v _SSPOV `VNb 1 s 0 @32310 ]
|
| 405 |
|
|
"246
|
| 406 |
|
|
[v _SSPEN `Nb 1 s 0 @32309 ]
|
| 407 |
|
|
"247
|
| 408 |
|
|
[v _CKP `Nb 1 s 0 @32308 ]
|
| 409 |
|
|
"248
|
| 410 |
|
|
[v _SSPM3 `Nb 1 s 0 @32307 ]
|
| 411 |
|
|
"249
|
| 412 |
|
|
[v _SSPM2 `Nb 1 s 0 @32306 ]
|
| 413 |
|
|
"250
|
| 414 |
|
|
[v _SSPM1 `Nb 1 s 0 @32305 ]
|
| 415 |
|
|
"251
|
| 416 |
|
|
[v _SSPM0 `Nb 1 s 0 @32304 ]
|
| 417 |
|
|
"254
|
| 418 |
|
|
[v _GCEN `Nb 1 s 0 @32303 ]
|
| 419 |
|
|
"255
|
| 420 |
|
|
[v _ACKSTAT `VNb 1 s 0 @32302 ]
|
| 421 |
|
|
"256
|
| 422 |
|
|
[v _ACKDT `VNb 1 s 0 @32301 ]
|
| 423 |
|
|
"257
|
| 424 |
|
|
[v _ACKEN `VNb 1 s 0 @32300 ]
|
| 425 |
|
|
"258
|
| 426 |
|
|
[v _RCEN `Nb 1 s 0 @32299 ]
|
| 427 |
|
|
"259
|
| 428 |
|
|
[v _PEN `VNb 1 s 0 @32298 ]
|
| 429 |
|
|
"260
|
| 430 |
|
|
[v _RSEN `VNb 1 s 0 @32297 ]
|
| 431 |
|
|
"261
|
| 432 |
|
|
[v _SEN `VNb 1 s 0 @32296 ]
|
| 433 |
|
|
"264
|
| 434 |
|
|
[v _ADCS1 `Nb 1 s 0 @32279 ]
|
| 435 |
|
|
"265
|
| 436 |
|
|
[v _ADCS0 `Nb 1 s 0 @32278 ]
|
| 437 |
|
|
"266
|
| 438 |
|
|
[v _CHS2 `Nb 1 s 0 @32277 ]
|
| 439 |
|
|
"267
|
| 440 |
|
|
[v _CHS1 `Nb 1 s 0 @32276 ]
|
| 441 |
|
|
"268
|
| 442 |
|
|
[v _CHS0 `Nb 1 s 0 @32275 ]
|
| 443 |
|
|
"269
|
| 444 |
|
|
[v _GODONE `VNb 1 s 0 @32274 ]
|
| 445 |
|
|
"270
|
| 446 |
|
|
[v _ADON `Nb 1 s 0 @32272 ]
|
| 447 |
|
|
"273
|
| 448 |
|
|
[v _ADFM `Nb 1 s 0 @32271 ]
|
| 449 |
|
|
"274
|
| 450 |
|
|
[v _ADCS2 `Nb 1 s 0 @32270 ]
|
| 451 |
|
|
"275
|
| 452 |
|
|
[v _PCFG3 `Nb 1 s 0 @32267 ]
|
| 453 |
|
|
"276
|
| 454 |
|
|
[v _PCFG2 `Nb 1 s 0 @32266 ]
|
| 455 |
|
|
"277
|
| 456 |
|
|
[v _PCFG1 `Nb 1 s 0 @32265 ]
|
| 457 |
|
|
"278
|
| 458 |
|
|
[v _PCFG0 `Nb 1 s 0 @32264 ]
|
| 459 |
|
|
"281
|
| 460 |
|
|
[v _DC1B1 `VNb 1 s 0 @32237 ]
|
| 461 |
|
|
"282
|
| 462 |
|
|
[v _DC1B0 `VNb 1 s 0 @32236 ]
|
| 463 |
|
|
"283
|
| 464 |
|
|
[v _CCP1M3 `Nb 1 s 0 @32235 ]
|
| 465 |
|
|
"284
|
| 466 |
|
|
[v _CCP1M2 `Nb 1 s 0 @32234 ]
|
| 467 |
|
|
"285
|
| 468 |
|
|
[v _CCP1M1 `Nb 1 s 0 @32233 ]
|
| 469 |
|
|
"286
|
| 470 |
|
|
[v _CCP1M0 `Nb 1 s 0 @32232 ]
|
| 471 |
|
|
"289
|
| 472 |
|
|
[v _DC2B1 `VNb 1 s 0 @32213 ]
|
| 473 |
|
|
"290
|
| 474 |
|
|
[v _DC2B0 `VNb 1 s 0 @32212 ]
|
| 475 |
|
|
"291
|
| 476 |
|
|
[v _CCP2M3 `Nb 1 s 0 @32211 ]
|
| 477 |
|
|
"292
|
| 478 |
|
|
[v _CCP2M2 `Nb 1 s 0 @32210 ]
|
| 479 |
|
|
"293
|
| 480 |
|
|
[v _CCP2M1 `Nb 1 s 0 @32209 ]
|
| 481 |
|
|
"294
|
| 482 |
|
|
[v _CCP2M0 `Nb 1 s 0 @32208 ]
|
| 483 |
|
|
"297
|
| 484 |
|
|
[v _T3RD16 `Nb 1 s 0 @32143 ]
|
| 485 |
|
|
"298
|
| 486 |
|
|
[v _T3CCP2 `Nb 1 s 0 @32142 ]
|
| 487 |
|
|
"299
|
| 488 |
|
|
[v _T3CKPS1 `Nb 1 s 0 @32141 ]
|
| 489 |
|
|
"300
|
| 490 |
|
|
[v _T3CKPS0 `Nb 1 s 0 @32140 ]
|
| 491 |
|
|
"301
|
| 492 |
|
|
[v _T3CCP1 `Nb 1 s 0 @32139 ]
|
| 493 |
|
|
"302
|
| 494 |
|
|
[v _T3SYNC `Nb 1 s 0 @32138 ]
|
| 495 |
|
|
"303
|
| 496 |
|
|
[v _TMR3CS `Nb 1 s 0 @32137 ]
|
| 497 |
|
|
"304
|
| 498 |
|
|
[v _TMR3ON `Nb 1 s 0 @32136 ]
|
| 499 |
|
|
"307
|
| 500 |
|
|
[v _CSRC `Nb 1 s 0 @32103 ]
|
| 501 |
|
|
"308
|
| 502 |
|
|
[v _TX9 `Nb 1 s 0 @32102 ]
|
| 503 |
|
|
"309
|
| 504 |
|
|
[v _TXEN `Nb 1 s 0 @32101 ]
|
| 505 |
|
|
"310
|
| 506 |
|
|
[v _SYNC `Nb 1 s 0 @32100 ]
|
| 507 |
|
|
"311
|
| 508 |
|
|
[v _BRGH `Nb 1 s 0 @32098 ]
|
| 509 |
|
|
"312
|
| 510 |
|
|
[v _TRMT `VNb 1 s 0 @32097 ]
|
| 511 |
|
|
"313
|
| 512 |
|
|
[v _TX9D `Nb 1 s 0 @32096 ]
|
| 513 |
|
|
"316
|
| 514 |
|
|
[v _SPEN `Nb 1 s 0 @32095 ]
|
| 515 |
|
|
"317
|
| 516 |
|
|
[v _RX9 `Nb 1 s 0 @32094 ]
|
| 517 |
|
|
"318
|
| 518 |
|
|
[v _SREN `Nb 1 s 0 @32093 ]
|
| 519 |
|
|
"319
|
| 520 |
|
|
[v _CREN `Nb 1 s 0 @32092 ]
|
| 521 |
|
|
"320
|
| 522 |
|
|
[v _ADDEN `Nb 1 s 0 @32091 ]
|
| 523 |
|
|
"321
|
| 524 |
|
|
[v _FERR `VNb 1 s 0 @32090 ]
|
| 525 |
|
|
"322
|
| 526 |
|
|
[v _OERR `VNb 1 s 0 @32089 ]
|
| 527 |
|
|
"323
|
| 528 |
|
|
[v _RX9D `VNb 1 s 0 @32088 ]
|
| 529 |
|
|
"326
|
| 530 |
|
|
[v _EEPGD `Nb 1 s 0 @32055 ]
|
| 531 |
|
|
"327
|
| 532 |
|
|
[v _CFGS `Nb 1 s 0 @32054 ]
|
| 533 |
|
|
"329
|
| 534 |
|
|
[v _EEFS `Nb 1 s 0 @32054 ]
|
| 535 |
|
|
"330
|
| 536 |
|
|
[v _FREE `VNb 1 s 0 @32052 ]
|
| 537 |
|
|
"331
|
| 538 |
|
|
[v _WRERR `VNb 1 s 0 @32051 ]
|
| 539 |
|
|
"332
|
| 540 |
|
|
[v _WREN `VNb 1 s 0 @32050 ]
|
| 541 |
|
|
"333
|
| 542 |
|
|
[v _WR `VNb 1 s 0 @32049 ]
|
| 543 |
|
|
"334
|
| 544 |
|
|
[v _RD `VNb 1 s 0 @32048 ]
|
| 545 |
|
|
"337
|
| 546 |
|
|
[v _EEIP `Nb 1 s 0 @32020 ]
|
| 547 |
|
|
"338
|
| 548 |
|
|
[v _BCLIP `Nb 1 s 0 @32019 ]
|
| 549 |
|
|
"339
|
| 550 |
|
|
[v _LVDIP `Nb 1 s 0 @32018 ]
|
| 551 |
|
|
"340
|
| 552 |
|
|
[v _TMR3IP `Nb 1 s 0 @32017 ]
|
| 553 |
|
|
"341
|
| 554 |
|
|
[v _CCP2IP `Nb 1 s 0 @32016 ]
|
| 555 |
|
|
"344
|
| 556 |
|
|
[v _EEIF `VNb 1 s 0 @32012 ]
|
| 557 |
|
|
"345
|
| 558 |
|
|
[v _BCLIF `VNb 1 s 0 @32011 ]
|
| 559 |
|
|
"346
|
| 560 |
|
|
[v _LVDIF `VNb 1 s 0 @32010 ]
|
| 561 |
|
|
"347
|
| 562 |
|
|
[v _TMR3IF `VNb 1 s 0 @32009 ]
|
| 563 |
|
|
"348
|
| 564 |
|
|
[v _CCP2IF `VNb 1 s 0 @32008 ]
|
| 565 |
|
|
"351
|
| 566 |
|
|
[v _EEIE `Nb 1 s 0 @32004 ]
|
| 567 |
|
|
"352
|
| 568 |
|
|
[v _BCLIE `Nb 1 s 0 @32003 ]
|
| 569 |
|
|
"353
|
| 570 |
|
|
[v _LVDIE `Nb 1 s 0 @32002 ]
|
| 571 |
|
|
"354
|
| 572 |
|
|
[v _TMR3IE `Nb 1 s 0 @32001 ]
|
| 573 |
|
|
"355
|
| 574 |
|
|
[v _CCP2IE `Nb 1 s 0 @32000 ]
|
| 575 |
|
|
"358
|
| 576 |
|
|
[v _PSPIP `Nb 1 s 0 @31999 ]
|
| 577 |
|
|
"359
|
| 578 |
|
|
[v _ADIP `Nb 1 s 0 @31998 ]
|
| 579 |
|
|
"360
|
| 580 |
|
|
[v _RCIP `Nb 1 s 0 @31997 ]
|
| 581 |
|
|
"361
|
| 582 |
|
|
[v _TXIP `Nb 1 s 0 @31996 ]
|
| 583 |
|
|
"362
|
| 584 |
|
|
[v _SSPIP `Nb 1 s 0 @31995 ]
|
| 585 |
|
|
"363
|
| 586 |
|
|
[v _CCP1IP `Nb 1 s 0 @31994 ]
|
| 587 |
|
|
"364
|
| 588 |
|
|
[v _TMR2IP `Nb 1 s 0 @31993 ]
|
| 589 |
|
|
"365
|
| 590 |
|
|
[v _TMR1IP `Nb 1 s 0 @31992 ]
|
| 591 |
|
|
"368
|
| 592 |
|
|
[v _PSPIF `VNb 1 s 0 @31991 ]
|
| 593 |
|
|
"369
|
| 594 |
|
|
[v _ADIF `VNb 1 s 0 @31990 ]
|
| 595 |
|
|
"370
|
| 596 |
|
|
[v _RCIF `VNb 1 s 0 @31989 ]
|
| 597 |
|
|
"371
|
| 598 |
|
|
[v _TXIF `VNb 1 s 0 @31988 ]
|
| 599 |
|
|
"372
|
| 600 |
|
|
[v _SSPIF `VNb 1 s 0 @31987 ]
|
| 601 |
|
|
"373
|
| 602 |
|
|
[v _CCP1IF `VNb 1 s 0 @31986 ]
|
| 603 |
|
|
"374
|
| 604 |
|
|
[v _TMR2IF `VNb 1 s 0 @31985 ]
|
| 605 |
|
|
"375
|
| 606 |
|
|
[v _TMR1IF `VNb 1 s 0 @31984 ]
|
| 607 |
|
|
"378
|
| 608 |
|
|
[v _PSPIE `Nb 1 s 0 @31983 ]
|
| 609 |
|
|
"379
|
| 610 |
|
|
[v _ADIE `Nb 1 s 0 @31982 ]
|
| 611 |
|
|
"380
|
| 612 |
|
|
[v _RCIE `Nb 1 s 0 @31981 ]
|
| 613 |
|
|
"381
|
| 614 |
|
|
[v _TXIE `Nb 1 s 0 @31980 ]
|
| 615 |
|
|
"382
|
| 616 |
|
|
[v _SSPIE `Nb 1 s 0 @31979 ]
|
| 617 |
|
|
"383
|
| 618 |
|
|
[v _CCP1IE `Nb 1 s 0 @31978 ]
|
| 619 |
|
|
"384
|
| 620 |
|
|
[v _TMR2IE `Nb 1 s 0 @31977 ]
|
| 621 |
|
|
"385
|
| 622 |
|
|
[v _TMR1IE `Nb 1 s 0 @31976 ]
|
| 623 |
|
|
"389
|
| 624 |
|
|
[v _IBF `VNb 1 s 0 @31927 ]
|
| 625 |
|
|
"390
|
| 626 |
|
|
[v _OBF `VNb 1 s 0 @31926 ]
|
| 627 |
|
|
"391
|
| 628 |
|
|
[v _IBOV `VNb 1 s 0 @31925 ]
|
| 629 |
|
|
"392
|
| 630 |
|
|
[v _PSPMODE `VNb 1 s 0 @31924 ]
|
| 631 |
|
|
"393
|
| 632 |
|
|
[v _TRISE2 `VNb 1 s 0 @31922 ]
|
| 633 |
|
|
"394
|
| 634 |
|
|
[v _TRISE1 `VNb 1 s 0 @31921 ]
|
| 635 |
|
|
"395
|
| 636 |
|
|
[v _TRISE0 `VNb 1 s 0 @31920 ]
|
| 637 |
|
|
"398
|
| 638 |
|
|
[v _TRISD7 `VNb 1 s 0 @31919 ]
|
| 639 |
|
|
"399
|
| 640 |
|
|
[v _TRISD6 `VNb 1 s 0 @31918 ]
|
| 641 |
|
|
"400
|
| 642 |
|
|
[v _TRISD5 `VNb 1 s 0 @31917 ]
|
| 643 |
|
|
"401
|
| 644 |
|
|
[v _TRISD4 `VNb 1 s 0 @31916 ]
|
| 645 |
|
|
"402
|
| 646 |
|
|
[v _TRISD3 `VNb 1 s 0 @31915 ]
|
| 647 |
|
|
"403
|
| 648 |
|
|
[v _TRISD2 `VNb 1 s 0 @31914 ]
|
| 649 |
|
|
"404
|
| 650 |
|
|
[v _TRISD1 `VNb 1 s 0 @31913 ]
|
| 651 |
|
|
"405
|
| 652 |
|
|
[v _TRISD0 `VNb 1 s 0 @31912 ]
|
| 653 |
|
|
"409
|
| 654 |
|
|
[v _TRISC7 `VNb 1 s 0 @31911 ]
|
| 655 |
|
|
"410
|
| 656 |
|
|
[v _TRISC6 `VNb 1 s 0 @31910 ]
|
| 657 |
|
|
"411
|
| 658 |
|
|
[v _TRISC5 `VNb 1 s 0 @31909 ]
|
| 659 |
|
|
"412
|
| 660 |
|
|
[v _TRISC4 `VNb 1 s 0 @31908 ]
|
| 661 |
|
|
"413
|
| 662 |
|
|
[v _TRISC3 `VNb 1 s 0 @31907 ]
|
| 663 |
|
|
"414
|
| 664 |
|
|
[v _TRISC2 `VNb 1 s 0 @31906 ]
|
| 665 |
|
|
"415
|
| 666 |
|
|
[v _TRISC1 `VNb 1 s 0 @31905 ]
|
| 667 |
|
|
"416
|
| 668 |
|
|
[v _TRISC0 `VNb 1 s 0 @31904 ]
|
| 669 |
|
|
"419
|
| 670 |
|
|
[v _TRISB7 `VNb 1 s 0 @31903 ]
|
| 671 |
|
|
"420
|
| 672 |
|
|
[v _TRISB6 `VNb 1 s 0 @31902 ]
|
| 673 |
|
|
"421
|
| 674 |
|
|
[v _TRISB5 `VNb 1 s 0 @31901 ]
|
| 675 |
|
|
"422
|
| 676 |
|
|
[v _TRISB4 `VNb 1 s 0 @31900 ]
|
| 677 |
|
|
"423
|
| 678 |
|
|
[v _TRISB3 `VNb 1 s 0 @31899 ]
|
| 679 |
|
|
"424
|
| 680 |
|
|
[v _TRISB2 `VNb 1 s 0 @31898 ]
|
| 681 |
|
|
"425
|
| 682 |
|
|
[v _TRISB1 `VNb 1 s 0 @31897 ]
|
| 683 |
|
|
"426
|
| 684 |
|
|
[v _TRISB0 `VNb 1 s 0 @31896 ]
|
| 685 |
|
|
"429
|
| 686 |
|
|
[v _TRISA6 `VNb 1 s 0 @31894 ]
|
| 687 |
|
|
"430
|
| 688 |
|
|
[v _TRISA5 `VNb 1 s 0 @31893 ]
|
| 689 |
|
|
"431
|
| 690 |
|
|
[v _TRISA4 `VNb 1 s 0 @31892 ]
|
| 691 |
|
|
"432
|
| 692 |
|
|
[v _TRISA3 `VNb 1 s 0 @31891 ]
|
| 693 |
|
|
"433
|
| 694 |
|
|
[v _TRISA2 `VNb 1 s 0 @31890 ]
|
| 695 |
|
|
"434
|
| 696 |
|
|
[v _TRISA1 `VNb 1 s 0 @31889 ]
|
| 697 |
|
|
"435
|
| 698 |
|
|
[v _TRISA0 `VNb 1 s 0 @31888 ]
|
| 699 |
|
|
"439
|
| 700 |
|
|
[v _LE0 `VNb 1 s 0 @31848 ]
|
| 701 |
|
|
"440
|
| 702 |
|
|
[v _LE1 `VNb 1 s 0 @31849 ]
|
| 703 |
|
|
"441
|
| 704 |
|
|
[v _LE2 `VNb 1 s 0 @31850 ]
|
| 705 |
|
|
"443
|
| 706 |
|
|
[v _LATE0 `VNb 1 s 0 @31848 ]
|
| 707 |
|
|
"444
|
| 708 |
|
|
[v _LATE1 `VNb 1 s 0 @31849 ]
|
| 709 |
|
|
"445
|
| 710 |
|
|
[v _LATE2 `VNb 1 s 0 @31850 ]
|
| 711 |
|
|
"448
|
| 712 |
|
|
[v _LD0 `VNb 1 s 0 @31840 ]
|
| 713 |
|
|
"449
|
| 714 |
|
|
[v _LD1 `VNb 1 s 0 @31841 ]
|
| 715 |
|
|
"450
|
| 716 |
|
|
[v _LD2 `VNb 1 s 0 @31842 ]
|
| 717 |
|
|
"451
|
| 718 |
|
|
[v _LD3 `VNb 1 s 0 @31843 ]
|
| 719 |
|
|
"452
|
| 720 |
|
|
[v _LD4 `VNb 1 s 0 @31844 ]
|
| 721 |
|
|
"453
|
| 722 |
|
|
[v _LD5 `VNb 1 s 0 @31845 ]
|
| 723 |
|
|
"454
|
| 724 |
|
|
[v _LD6 `VNb 1 s 0 @31846 ]
|
| 725 |
|
|
"455
|
| 726 |
|
|
[v _LD7 `VNb 1 s 0 @31847 ]
|
| 727 |
|
|
"457
|
| 728 |
|
|
[v _LATD0 `VNb 1 s 0 @31840 ]
|
| 729 |
|
|
"458
|
| 730 |
|
|
[v _LATD1 `VNb 1 s 0 @31841 ]
|
| 731 |
|
|
"459
|
| 732 |
|
|
[v _LATD2 `VNb 1 s 0 @31842 ]
|
| 733 |
|
|
"460
|
| 734 |
|
|
[v _LATD3 `VNb 1 s 0 @31843 ]
|
| 735 |
|
|
"461
|
| 736 |
|
|
[v _LATD4 `VNb 1 s 0 @31844 ]
|
| 737 |
|
|
"462
|
| 738 |
|
|
[v _LATD5 `VNb 1 s 0 @31845 ]
|
| 739 |
|
|
"463
|
| 740 |
|
|
[v _LATD6 `VNb 1 s 0 @31846 ]
|
| 741 |
|
|
"464
|
| 742 |
|
|
[v _LATD7 `VNb 1 s 0 @31847 ]
|
| 743 |
|
|
"468
|
| 744 |
|
|
[v _LC0 `VNb 1 s 0 @31832 ]
|
| 745 |
|
|
"469
|
| 746 |
|
|
[v _LC1 `VNb 1 s 0 @31833 ]
|
| 747 |
|
|
"470
|
| 748 |
|
|
[v _LC2 `VNb 1 s 0 @31834 ]
|
| 749 |
|
|
"471
|
| 750 |
|
|
[v _LC3 `VNb 1 s 0 @31835 ]
|
| 751 |
|
|
"472
|
| 752 |
|
|
[v _LC4 `VNb 1 s 0 @31836 ]
|
| 753 |
|
|
"473
|
| 754 |
|
|
[v _LC5 `VNb 1 s 0 @31837 ]
|
| 755 |
|
|
"474
|
| 756 |
|
|
[v _LC6 `VNb 1 s 0 @31838 ]
|
| 757 |
|
|
"475
|
| 758 |
|
|
[v _LC7 `VNb 1 s 0 @31839 ]
|
| 759 |
|
|
"477
|
| 760 |
|
|
[v _LATC0 `VNb 1 s 0 @31832 ]
|
| 761 |
|
|
"478
|
| 762 |
|
|
[v _LATC1 `VNb 1 s 0 @31833 ]
|
| 763 |
|
|
"479
|
| 764 |
|
|
[v _LATC2 `VNb 1 s 0 @31834 ]
|
| 765 |
|
|
"480
|
| 766 |
|
|
[v _LATC3 `VNb 1 s 0 @31835 ]
|
| 767 |
|
|
"481
|
| 768 |
|
|
[v _LATC4 `VNb 1 s 0 @31836 ]
|
| 769 |
|
|
"482
|
| 770 |
|
|
[v _LATC5 `VNb 1 s 0 @31837 ]
|
| 771 |
|
|
"483
|
| 772 |
|
|
[v _LATC6 `VNb 1 s 0 @31838 ]
|
| 773 |
|
|
"484
|
| 774 |
|
|
[v _LATC7 `VNb 1 s 0 @31839 ]
|
| 775 |
|
|
"487
|
| 776 |
|
|
[v _LB0 `VNb 1 s 0 @31824 ]
|
| 777 |
|
|
"488
|
| 778 |
|
|
[v _LB1 `VNb 1 s 0 @31825 ]
|
| 779 |
|
|
"489
|
| 780 |
|
|
[v _LB2 `VNb 1 s 0 @31826 ]
|
| 781 |
|
|
"490
|
| 782 |
|
|
[v _LB3 `VNb 1 s 0 @31827 ]
|
| 783 |
|
|
"491
|
| 784 |
|
|
[v _LB4 `VNb 1 s 0 @31828 ]
|
| 785 |
|
|
"492
|
| 786 |
|
|
[v _LB5 `VNb 1 s 0 @31829 ]
|
| 787 |
|
|
"493
|
| 788 |
|
|
[v _LB6 `VNb 1 s 0 @31830 ]
|
| 789 |
|
|
"494
|
| 790 |
|
|
[v _LB7 `VNb 1 s 0 @31831 ]
|
| 791 |
|
|
"496
|
| 792 |
|
|
[v _LATB0 `VNb 1 s 0 @31824 ]
|
| 793 |
|
|
"497
|
| 794 |
|
|
[v _LATB1 `VNb 1 s 0 @31825 ]
|
| 795 |
|
|
"498
|
| 796 |
|
|
[v _LATB2 `VNb 1 s 0 @31826 ]
|
| 797 |
|
|
"499
|
| 798 |
|
|
[v _LATB3 `VNb 1 s 0 @31827 ]
|
| 799 |
|
|
"500
|
| 800 |
|
|
[v _LATB4 `VNb 1 s 0 @31828 ]
|
| 801 |
|
|
"501
|
| 802 |
|
|
[v _LATB5 `VNb 1 s 0 @31829 ]
|
| 803 |
|
|
"502
|
| 804 |
|
|
[v _LATB6 `VNb 1 s 0 @31830 ]
|
| 805 |
|
|
"503
|
| 806 |
|
|
[v _LATB7 `VNb 1 s 0 @31831 ]
|
| 807 |
|
|
"506
|
| 808 |
|
|
[v _LA0 `VNb 1 s 0 @31816 ]
|
| 809 |
|
|
"507
|
| 810 |
|
|
[v _LA1 `VNb 1 s 0 @31817 ]
|
| 811 |
|
|
"508
|
| 812 |
|
|
[v _LA2 `VNb 1 s 0 @31818 ]
|
| 813 |
|
|
"509
|
| 814 |
|
|
[v _LA3 `VNb 1 s 0 @31819 ]
|
| 815 |
|
|
"510
|
| 816 |
|
|
[v _LA4 `VNb 1 s 0 @31820 ]
|
| 817 |
|
|
"511
|
| 818 |
|
|
[v _LA5 `VNb 1 s 0 @31821 ]
|
| 819 |
|
|
"512
|
| 820 |
|
|
[v _LA6 `VNb 1 s 0 @31822 ]
|
| 821 |
|
|
"514
|
| 822 |
|
|
[v _LATA0 `VNb 1 s 0 @31816 ]
|
| 823 |
|
|
"515
|
| 824 |
|
|
[v _LATA1 `VNb 1 s 0 @31817 ]
|
| 825 |
|
|
"516
|
| 826 |
|
|
[v _LATA2 `VNb 1 s 0 @31818 ]
|
| 827 |
|
|
"517
|
| 828 |
|
|
[v _LATA3 `VNb 1 s 0 @31819 ]
|
| 829 |
|
|
"518
|
| 830 |
|
|
[v _LATA4 `VNb 1 s 0 @31820 ]
|
| 831 |
|
|
"519
|
| 832 |
|
|
[v _LATA5 `VNb 1 s 0 @31821 ]
|
| 833 |
|
|
"520
|
| 834 |
|
|
[v _LATA6 `VNb 1 s 0 @31822 ]
|
| 835 |
|
|
"524
|
| 836 |
|
|
[v _RE0 `VNb 1 s 0 @31776 ]
|
| 837 |
|
|
"525
|
| 838 |
|
|
[v _RE1 `VNb 1 s 0 @31777 ]
|
| 839 |
|
|
"526
|
| 840 |
|
|
[v _RE2 `VNb 1 s 0 @31778 ]
|
| 841 |
|
|
"529
|
| 842 |
|
|
[v _RD0 `VNb 1 s 0 @31768 ]
|
| 843 |
|
|
"530
|
| 844 |
|
|
[v _RD1 `VNb 1 s 0 @31769 ]
|
| 845 |
|
|
"531
|
| 846 |
|
|
[v _RD2 `VNb 1 s 0 @31770 ]
|
| 847 |
|
|
"532
|
| 848 |
|
|
[v _RD3 `VNb 1 s 0 @31771 ]
|
| 849 |
|
|
"533
|
| 850 |
|
|
[v _RD4 `VNb 1 s 0 @31772 ]
|
| 851 |
|
|
"534
|
| 852 |
|
|
[v _RD5 `VNb 1 s 0 @31773 ]
|
| 853 |
|
|
"535
|
| 854 |
|
|
[v _RD6 `VNb 1 s 0 @31774 ]
|
| 855 |
|
|
"536
|
| 856 |
|
|
[v _RD7 `VNb 1 s 0 @31775 ]
|
| 857 |
|
|
"540
|
| 858 |
|
|
[v _RC0 `VNb 1 s 0 @31760 ]
|
| 859 |
|
|
"541
|
| 860 |
|
|
[v _RC1 `VNb 1 s 0 @31761 ]
|
| 861 |
|
|
"542
|
| 862 |
|
|
[v _RC2 `VNb 1 s 0 @31762 ]
|
| 863 |
|
|
"543
|
| 864 |
|
|
[v _RC3 `VNb 1 s 0 @31763 ]
|
| 865 |
|
|
"544
|
| 866 |
|
|
[v _RC4 `VNb 1 s 0 @31764 ]
|
| 867 |
|
|
"545
|
| 868 |
|
|
[v _RC5 `VNb 1 s 0 @31765 ]
|
| 869 |
|
|
"546
|
| 870 |
|
|
[v _RC6 `VNb 1 s 0 @31766 ]
|
| 871 |
|
|
"547
|
| 872 |
|
|
[v _RC7 `VNb 1 s 0 @31767 ]
|
| 873 |
|
|
"550
|
| 874 |
|
|
[v _RB0 `VNb 1 s 0 @31752 ]
|
| 875 |
|
|
"551
|
| 876 |
|
|
[v _RB1 `VNb 1 s 0 @31753 ]
|
| 877 |
|
|
"552
|
| 878 |
|
|
[v _RB2 `VNb 1 s 0 @31754 ]
|
| 879 |
|
|
"553
|
| 880 |
|
|
[v _RB3 `VNb 1 s 0 @31755 ]
|
| 881 |
|
|
"554
|
| 882 |
|
|
[v _RB4 `VNb 1 s 0 @31756 ]
|
| 883 |
|
|
"555
|
| 884 |
|
|
[v _RB5 `VNb 1 s 0 @31757 ]
|
| 885 |
|
|
"556
|
| 886 |
|
|
[v _RB6 `VNb 1 s 0 @31758 ]
|
| 887 |
|
|
"557
|
| 888 |
|
|
[v _RB7 `VNb 1 s 0 @31759 ]
|
| 889 |
|
|
"560
|
| 890 |
|
|
[v _RA0 `VNb 1 s 0 @31744 ]
|
| 891 |
|
|
"561
|
| 892 |
|
|
[v _RA1 `VNb 1 s 0 @31745 ]
|
| 893 |
|
|
"562
|
| 894 |
|
|
[v _RA2 `VNb 1 s 0 @31746 ]
|
| 895 |
|
|
"563
|
| 896 |
|
|
[v _RA3 `VNb 1 s 0 @31747 ]
|
| 897 |
|
|
"564
|
| 898 |
|
|
[v _RA4 `VNb 1 s 0 @31748 ]
|
| 899 |
|
|
"565
|
| 900 |
|
|
[v _RA5 `VNb 1 s 0 @31749 ]
|
| 901 |
|
|
"566
|
| 902 |
|
|
[v _RA6 `VNb 1 s 0 @31750 ]
|
| 903 |
|
|
"12 C:\Programmer\HI-TECH Software\PICC-18\9.50\include\stdio.h
|
| 904 |
|
|
[v _ptrdiff_t `i 1 t 2 ]
|
| 905 |
|
|
"13
|
| 906 |
|
|
[v _size_t `ui 1 t 2 ]
|
| 907 |
|
|
"14
|
| 908 |
|
|
[v _wchar_t `us 1 t 2 ]
|
| 909 |
|
|
"20 C:\Programmer\HI-TECH Software\PICC-18\9.50\include\stdarg.h
|
| 910 |
|
|
[v _va_list `*v 1a t 2 ]
|
| 911 |
|
|
"61 C:\Programmer\HI-TECH Software\PICC-18\9.50\include\stdio.h
|
| 912 |
|
|
[v F838 `(v 1 t 0 ]
|
| 913 |
|
|
"62
|
| 914 |
|
|
[s S1 __prbuf 4 `*uc 1 ptr 2 0
|
| 915 |
|
|
`*F838 1 func 2 2
|
| 916 |
|
|
]
|
| 917 |
hedin |
148 |
"19 C:\Documents and Settings\Admin\Skrivebord\SVN\trunk\Embedded\main.c
|
| 918 |
hedin |
109 |
[v _global_Pot_Hi `uc 1 e 1 0 ]
|
| 919 |
|
|
[v _global_Pot_Lo `uc 1 e 1 0 ]
|
| 920 |
hedin |
148 |
"20
|
| 921 |
hedin |
139 |
[v F993 `uc 16a t 16 ]
|
| 922 |
|
|
[v _global_LCD_Buffer `F993 2a e 32 0 ]
|
| 923 |
hedin |
148 |
"21
|
| 924 |
hedin |
139 |
[v _global_serial_send `uc 128a e 128 0 ]
|
| 925 |
hedin |
148 |
[v _global_serial_recieve_buffer `uc 128a e 128 0 ]
|
| 926 |
|
|
"22
|
| 927 |
hedin |
137 |
[v _global_recieve_done `b 1 e 0 0 ]
|
| 928 |
hedin |
148 |
[v _global_interval_changed `b 1 e 0 0 ]
|
| 929 |
|
|
"23
|
| 930 |
|
|
[v _global_serial_byte_counter `ui 1 e 2 0 ]
|
| 931 |
|
|
[v _global_sms_counter `ui 1 e 2 0 ]
|
| 932 |
|
|
[v _global_time_counter `ui 1 e 2 0 ]
|
| 933 |
|
|
"24
|
| 934 |
|
|
[v _global_emergency_counter `ui 1 e 2 0 ]
|
| 935 |
|
|
[v _global_time_interval `ui 1 e 2 0 ]
|
| 936 |
|
|
"25
|
| 937 |
|
|
[v _global_temp `uc 1 e 1 0 ]
|
| 938 |
|
|
"27
|
| 939 |
|
|
[v _cell_nr `uc 15a e 15 0 ]
|
| 940 |
|
|
"41
|
| 941 |
hedin |
109 |
[v _ad_init `(v 1 e 0 0 ]
|
| 942 |
hedin |
100 |
{
|
| 943 |
hedin |
148 |
"64
|
| 944 |
hedin |
100 |
} 0
|
| 945 |
hedin |
148 |
"67
|
| 946 |
hedin |
82 |
[v _rs232_init `(v 1 e 0 0 ]
|
| 947 |
|
|
{
|
| 948 |
hedin |
148 |
"76
|
| 949 |
hedin |
82 |
} 0
|
| 950 |
hedin |
148 |
"79
|
| 951 |
hedin |
82 |
[v _interrupt_init `(v 1 e 0 0 ]
|
| 952 |
|
|
{
|
| 953 |
hedin |
148 |
"87
|
| 954 |
hedin |
82 |
} 0
|
| 955 |
hedin |
148 |
"90
|
| 956 |
|
|
[v _timer_init `(v 1 e 0 0 ]
|
| 957 |
|
|
{
|
| 958 |
|
|
"102
|
| 959 |
|
|
} 0
|
| 960 |
|
|
"105
|
| 961 |
hedin |
82 |
[v _pic18_io_init `(v 1 e 0 0 ]
|
| 962 |
|
|
{
|
| 963 |
hedin |
148 |
"112
|
| 964 |
hedin |
82 |
} 0
|
| 965 |
hedin |
148 |
"115
|
| 966 |
hedin |
139 |
[v _sms_init `(v 1 e 0 0 ]
|
| 967 |
hedin |
82 |
{
|
| 968 |
hedin |
148 |
"116
|
| 969 |
hedin |
139 |
[v _i `i 1 a 2 0 ]
|
| 970 |
hedin |
148 |
"130
|
| 971 |
hedin |
139 |
} 2
|
| 972 |
hedin |
148 |
"134
|
| 973 |
|
|
[v F1030 `(v 1 t 0 ]
|
| 974 |
|
|
[v _interrupt_handler `IF1030 1 e 0 0 ]
|
| 975 |
hedin |
139 |
{
|
| 976 |
hedin |
148 |
"147
|
| 977 |
hedin |
82 |
} 0
|
| 978 |
hedin |
148 |
"151
|
| 979 |
hedin |
137 |
[v _serial_send `(v 1 e 0 0 ]
|
| 980 |
hedin |
82 |
{
|
| 981 |
hedin |
148 |
"152
|
| 982 |
hedin |
137 |
[v _i `i 1 a 2 0 ]
|
| 983 |
hedin |
148 |
"153
|
| 984 |
|
|
[v _data_byte `uc 1 a 1 2 ]
|
| 985 |
|
|
"165
|
| 986 |
hedin |
139 |
} 3
|
| 987 |
hedin |
148 |
"168
|
| 988 |
hedin |
137 |
[v _serial_recieved `(v 1 e 0 0 ]
|
| 989 |
hedin |
109 |
{
|
| 990 |
hedin |
148 |
"169
|
| 991 |
|
|
[v _data_byte `uc 1 a 1 0 ]
|
| 992 |
hedin |
137 |
[v _saved_data `uc 16a a 16 1 ]
|
| 993 |
hedin |
148 |
"184
|
| 994 |
hedin |
137 |
} 17
|
| 995 |
hedin |
148 |
"187
|
| 996 |
|
|
[v _timer1_interrupt `(v 1 e 0 0 ]
|
| 997 |
|
|
{
|
| 998 |
|
|
"193
|
| 999 |
|
|
} 0
|
| 1000 |
|
|
"196
|
| 1001 |
hedin |
139 |
[v _update_lcd `(v 1 e 0 0 ]
|
| 1002 |
|
|
{
|
| 1003 |
hedin |
148 |
"204
|
| 1004 |
hedin |
139 |
} 0
|
| 1005 |
hedin |
148 |
"207
|
| 1006 |
|
|
[v _send_update `(v 1 e 0 0 ]
|
| 1007 |
|
|
{
|
| 1008 |
|
|
"216
|
| 1009 |
|
|
} 0
|
| 1010 |
|
|
"220
|
| 1011 |
|
|
[v _convertTemp `(v 1 e 0 0 ]
|
| 1012 |
|
|
{
|
| 1013 |
|
|
"221
|
| 1014 |
|
|
[v _adVal `s 1 a 2 0 ]
|
| 1015 |
|
|
"227
|
| 1016 |
|
|
} 2
|
| 1017 |
|
|
"232
|
| 1018 |
|
|
[v _eeprom_writer `(v 1 e 0 0 ]
|
| 1019 |
|
|
{
|
| 1020 |
|
|
"233
|
| 1021 |
|
|
[v _len `uc 1 a 1 0 ]
|
| 1022 |
|
|
[v _i `uc 1 a 1 1 ]
|
| 1023 |
|
|
"250
|
| 1024 |
|
|
} 2
|
| 1025 |
|
|
"253
|
| 1026 |
|
|
[v _eeprom_reader `(v 1 e 0 0 ]
|
| 1027 |
|
|
{
|
| 1028 |
|
|
"254
|
| 1029 |
|
|
[v _len `uc 1 a 1 0 ]
|
| 1030 |
|
|
[v _i `uc 1 a 1 1 ]
|
| 1031 |
|
|
"267
|
| 1032 |
|
|
} 2
|
| 1033 |
|
|
"271
|
| 1034 |
hedin |
82 |
[v _main `(v 1 e 0 0 ]
|
| 1035 |
|
|
{
|
| 1036 |
hedin |
148 |
"318
|
| 1037 |
hedin |
82 |
} 0
|
| 1038 |
hedin |
109 |
[v _lcd_init `(v 0 e 0 0 ]
|
| 1039 |
|
|
[v _lcd_puts `(v 0 e 0 0 ]
|
| 1040 |
hedin |
148 |
[v _strlen `(ui 0 e 2 0 ]
|
| 1041 |
hedin |
139 |
[v _DelaySek `(v 0 e 0 0 ]
|
| 1042 |
hedin |
148 |
[v _eeprom_read `(uc 0 e 1 0 ]
|
| 1043 |
|
|
[v _eeprom_write `(v 0 e 0 0 ]
|
| 1044 |
hedin |
109 |
[v _lcd_cmd `(v 0 e 0 0 ]
|
| 1045 |
hedin |
137 |
[v _DelayMs `(v 0 e 0 0 ]
|
| 1046 |
hedin |
109 |
[v _sprintf `(i 0 e 2 0 ]
|
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