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Contents of /trunk/docs/Microchip TCP_IP stack/Include/TCPIP Stack/MAC.h

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Revision 15 - (show annotations) (download)
Thu Apr 19 09:01:15 2007 UTC (17 years, 1 month ago) by hedin
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File size: 9755 byte(s)
added the TCP/IP stack, source code.
1 /*********************************************************************
2 *
3 * MAC Module Defs for Microchip Stack
4 *
5 *********************************************************************
6 * FileName: MAC.h
7 * Dependencies: StackTsk.h
8 * Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F
9 * Complier: Microchip C18 v3.02 or higher
10 * Microchip C30 v2.01 or higher
11 * Company: Microchip Technology, Inc.
12 *
13 * Software License Agreement
14 *
15 * Copyright © 2002-2007 Microchip Technology Inc. All rights
16 * reserved.
17 *
18 * Microchip licenses to you the right to use, modify, copy, and
19 * distribute:
20 * (i) the Software when embedded on a Microchip microcontroller or
21 * digital signal controller product (“Device”) which is
22 * integrated into Licensee’s product; or
23 * (ii) ONLY the Software driver source files ENC28J60.c and
24 * ENC28J60.h ported to a non-Microchip device used in
25 * conjunction with a Microchip ethernet controller for the
26 * sole purpose of interfacing with the ethernet controller.
27 *
28 * You should refer to the license agreement accompanying this
29 * Software for additional information regarding your rights and
30 * obligations.
31 *
32 * THE SOFTWARE AND DOCUMENTATION ARE PROVIDED “AS IS” WITHOUT
33 * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
34 * LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
35 * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
36 * MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
37 * CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
38 * PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
39 * BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
40 * THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
41 * SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
42 * (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
43 *
44 *
45 * Author Date Comment
46 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
47 * Nilesh Rajbharti 4/27/01 Original (Rev 1.0)
48 * Nilesh Rajbharti 11/27/01 Added SLIP
49 * Nilesh Rajbharti 2/9/02 Cleanup
50 * Nilesh Rajbharti 5/22/02 Rev 2.0 (See version.log for detail)
51 * Howard Schlunder 6/28/04 Added ENC28J60 specific features
52 * Howard Schlunder 11/29/04 Added Get/SetLEDConfig macros
53 ********************************************************************/
54 #ifndef __MAC_H
55 #define __MAC_H
56
57
58 #if (!defined(ENC_CS_TRIS)) && \
59 (defined(__18F97J60) || defined(__18F96J65) || defined(__18F96J60) || defined(__18F87J60) || defined(__18F86J65) || defined(__18F86J60) || defined(__18F67J60) || defined(__18F66J65) || defined(__18F66J60) || \
60 defined(_18F97J60) || defined(_18F96J65) || defined(_18F96J60) || defined(_18F87J60) || defined(_18F86J65) || defined(_18F86J60) || defined(_18F67J60) || defined(_18F66J65) || defined(_18F66J60))
61 #include "TCPIP Stack/ETH97J60.h"
62 #else
63 #include "TCPIP Stack/ENC28J60.h"
64 #endif
65
66 #if !defined(STACK_USE_SLIP)
67 // The MAC_TX_BUFFER_COUNT must be equal to MAX_TCP_SOCKETS + 1
68 // (1 reserved for high priority messages), or else calls to
69 // TCPPut may fail when multiple TCP sockets have data pending
70 // in the output buffer that hasn't been ACKed. Changing this
71 // value is recommended only if the rammifications of doing so
72 // are properly understood.
73 #if defined(NON_MCHP_MAC)
74 #define MAC_TX_BUFFER_SIZE (1024ul)
75 #define MAC_TX_BUFFER_COUNT (1u)
76
77 #if (MAC_TX_BUFFER_SIZE <= 0 || MAC_TX_BUFFER_SIZE > 1500 )
78 #error Invalid MAC_TX_BUFFER_SIZE value specified.
79 #endif
80 #else
81 #define MAC_TX_BUFFER_SIZE (1500ul)
82 #endif
83
84 // A generic structure representing the Ethernet header starting all Ethernet
85 // frames
86 typedef struct _ETHER_HEADER
87 {
88 MAC_ADDR DestMACAddr;
89 MAC_ADDR SourceMACAddr;
90 WORD_VAL Type;
91 } ETHER_HEADER;
92 #else
93 /*
94 * For SLIP, there can only be one transmit and one receive buffer.
95 * Both buffers must fit in one bank. If bigger buffer is required,
96 * you must manually locate tx and rx buffer in different bank
97 * or modify your linker script file to support arrays bigger than
98 * 256 bytes.
99 */
100 #define MAC_TX_BUFFER_SIZE (250ul)
101 #define MAC_TX_BUFFER_COUNT (1u)
102
103
104 typedef struct _ETHER_HEADER
105 {
106 } ETHER_HEADER;
107 #endif
108 // Rest are Receive Buffers
109
110
111 #define MAC_IP (0x00u)
112 #define MAC_ARP (0x06u)
113 #define MAC_UNKNOWN (0xFFu)
114
115
116
117 /*
118 * Microchip Ethernet controller specific MAC items
119 */
120 #if !defined(RESERVED_TCP_MEMORY)
121 #define RESERVED_TCP_MEMORY 0ul
122 #endif
123
124 // MAC RAM definitions
125 #define RAMSIZE 8192ul
126 #define TXSTART ((RAMSIZE-1ul) - (1ul+1514ul+7ul) - RESERVED_TCP_MEMORY)
127 #define RXSTART (0ul) // Should be an even memory address; must be 0 for errata
128 #define RXSTOP ((TXSTART-2ul) | 0x0001ul) // Odd for errata workaround
129 #define RXSIZE (RXSTOP-RXSTART+1ul)
130
131 #define BASE_TX_ADDR (TXSTART + 1ul)
132 #define BASE_TCB_ADDR (BASE_TX_ADDR + (1514ul+7ul))
133
134 #if RXSIZE < 1400
135 #error Warning, Ethernet RX buffer is tiny. Reduce MAX_TCP_SOCKETS, TCP_TX_FIFO_SIZE, or TCP_RX_FIFO_SIZE
136 #endif
137
138
139 WORD MACCalcRxChecksum(WORD offset, WORD len);
140 WORD CalcIPBufferChecksum(WORD len);
141
142 void MACPowerDown(void);
143 void MACPowerUp(void);
144 void WritePHYReg(BYTE Register, WORD Data);
145 PHYREG ReadPHYReg(BYTE Register);
146 void SetRXHashTableEntry(MAC_ADDR DestMACAddr);
147
148 // ENC28J60 specific
149 void SetCLKOUT(BYTE NewConfig);
150 BYTE GetCLKOUT(void);
151
152 /******************************************************************************
153 * Macro: void SetLEDConfig(WORD NewConfig)
154 *
155 * PreCondition: SPI bus must be initialized (done in MACInit()).
156 *
157 * Input: NewConfig - xxx0: Pulse stretching disabled
158 * xxx2: Pulse stretch to 40ms (default)
159 * xxx6: Pulse stretch to 73ms
160 * xxxA: Pulse stretch to 139ms
161 *
162 * xx1x: LEDB - TX
163 * xx2x: LEDB - RX (default)
164 * xx3x: LEDB - collisions
165 * xx4x: LEDB - link
166 * xx5x: LEDB - duplex
167 * xx7x: LEDB - TX and RX
168 * xx8x: LEDB - on
169 * xx9x: LEDB - off
170 * xxAx: LEDB - blink fast
171 * xxBx: LEDB - blink slow
172 * xxCx: LEDB - link and RX
173 * xxDx: LEDB - link and TX and RX
174 * xxEx: LEDB - duplex and collisions
175 *
176 * x1xx: LEDA - TX
177 * x2xx: LEDA - RX
178 * x3xx: LEDA - collisions
179 * x4xx: LEDA - link (default)
180 * x5xx: LEDA - duplex
181 * x7xx: LEDA - TX and RX
182 * x8xx: LEDA - on
183 * x9xx: LEDA - off
184 * xAxx: LEDA - blink fast
185 * xBxx: LEDA - blink slow
186 * xCxx: LEDA - link and RX
187 * xDxx: LEDA - link and TX and RX
188 * xExx: LEDA - duplex and collisions
189 *
190 * Output: None
191 *
192 * Side Effects: None
193 *
194 * Overview: Writes the value of NewConfig into the PHLCON PHY register.
195 * The LED pins will beginning outputting the new
196 * configuration immediately.
197 *
198 * Note:
199 *****************************************************************************/
200 #define SetLEDConfig(NewConfig) WritePHYReg(PHLCON, NewConfig)
201
202
203 /******************************************************************************
204 * Macro: WORD GetLEDConfig(void)
205 *
206 * PreCondition: SPI bus must be initialized (done in MACInit()).
207 *
208 * Input: None
209 *
210 * Output: WORD - xxx0: Pulse stretching disabled
211 * xxx2: Pulse stretch to 40ms (default)
212 * xxx6: Pulse stretch to 73ms
213 * xxxA: Pulse stretch to 139ms
214 *
215 * xx1x: LEDB - TX
216 * xx2x: LEDB - RX (default)
217 * xx3x: LEDB - collisions
218 * xx4x: LEDB - link
219 * xx5x: LEDB - duplex
220 * xx7x: LEDB - TX and RX
221 * xx8x: LEDB - on
222 * xx9x: LEDB - off
223 * xxAx: LEDB - blink fast
224 * xxBx: LEDB - blink slow
225 * xxCx: LEDB - link and RX
226 * xxDx: LEDB - link and TX and RX
227 * xxEx: LEDB - duplex and collisions
228 *
229 * x1xx: LEDA - TX
230 * x2xx: LEDA - RX
231 * x3xx: LEDA - collisions
232 * x4xx: LEDA - link (default)
233 * x5xx: LEDA - duplex
234 * x7xx: LEDA - TX and RX
235 * x8xx: LEDA - on
236 * x9xx: LEDA - off
237 * xAxx: LEDA - blink fast
238 * xBxx: LEDA - blink slow
239 * xCxx: LEDA - link and RX
240 * xDxx: LEDA - link and TX and RX
241 * xExx: LEDA - duplex and collisions
242 *
243 * Side Effects: None
244 *
245 * Overview: Returns the current value of the PHLCON register.
246 *
247 * Note: None
248 *****************************************************************************/
249 #define GetLEDConfig() ReadPHYReg(PHLCON).Val
250
251
252 void MACInit(void);
253 BOOL MACIsLinked(void);
254
255 BOOL MACGetHeader(MAC_ADDR *remote, BYTE* type);
256 void MACSetReadPtrInRx(WORD offset);
257 WORD MACSetWritePtr(WORD address);
258 WORD MACSetReadPtr(WORD address);
259 BYTE MACGet(void);
260 WORD MACGetArray(BYTE *val, WORD len);
261 void MACDiscardRx(void);
262 WORD MACGetFreeRxSize(void);
263 void MACMemCopyAsync(WORD destAddr, WORD sourceAddr, WORD len);
264 BOOL MACIsMemCopyDone(void);
265
266 void MACPutHeader(MAC_ADDR *remote, BYTE type, WORD dataLen);
267 BOOL MACIsTxReady(void);
268 void MACPut(BYTE val);
269 void MACPutArray(BYTE *val, WORD len);
270 void MACPutROMArray(ROM BYTE *val, WORD len);
271 void MACFlush(void);
272
273
274 #if defined(STACK_USE_SLIP)
275 #define NICCurrentTxBuffer (0u)
276 #endif
277
278
279
280 #endif

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