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/*********************************************************************
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*
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* MAC Module for Microchip TCP/IP Stack
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*
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*********************************************************************
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* FileName: MAC.c
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* Dependencies: string.h
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* stacktsk.h
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* helpers.h
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* mac.h
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* Processor: PIC18
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* Complier: MCC18 v1.00.50 or higher
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* HITECH PICC-18 V8.10PL1 or higher
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* Company: Microchip Technology, Inc.
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*
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* Software License Agreement
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*
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* The software supplied herewith by Microchip Technology Incorporated
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* (the “Company”) for its PICmicro® Microcontroller is intended and
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* supplied to you, the Company’s customer, for use solely and
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* exclusively on Microchip PICmicro Microcontroller products. The
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* software is owned by the Company and/or its supplier, and is
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* protected under applicable copyright laws. All rights are reserved.
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* Any use in violation of the foregoing restrictions may subject the
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* user to criminal sanctions under applicable laws, as well as to
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* civil liability for the breach of the terms and conditions of this
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* license.
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*
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* THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
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* TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
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* IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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*
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* HiTech PICC18 Compiler Options excluding device selection:
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* -FAKELOCAL -G -O -Zg -E -C
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*
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*
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*
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*
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* Author Date Comment
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*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* Nilesh Rajbharti 4/27/00 Original (Rev 1.0)
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* Nilesh Rajbharti 2/9/02 Cleanup
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* Nilesh Rajbharti 5/22/02 Rev 2.0 (See version.log for detail)
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* Nilesh Rajbharti 3/21/03 Fixed MACIsTxReady() bug where upon
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* certain bus collision, this would always
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* return FLASE causing Stack to not handle
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* any incoming packets at all.
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********************************************************************/
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#define THIS_IS_MAC_LAYER
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#include <string.h>
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#include "stacktsk.h"
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#include "helpers.h"
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#include "mac.h"
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#include "delay.h"
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#if defined(STACK_USE_SLIP)
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#error Unexpected module is detected.
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#error This file must be linked when SLIP module is not in use.
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#endif
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/*
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* Hardware interface to NIC.
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*/
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#define NIC_CTRL_TRIS (TRISE)
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#define NIC_RESET_IO (PORTE_RE2)
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#define NIC_IOW_IO (PORTE_RE1)
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#define NIC_IOR_IO (PORTE_RE0)
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#define NIC_ADDR_IO (PORTB)
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#define NIC_DATA_IO (PORTD)
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#define NIC_DATAPORT (0x10)
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#define NIC_RESET (0x1f)
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/* Ethernet definitions.. */
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#define MINFRAME 60
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#define MINFRAMEC 64
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#define CRCLEN 4
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#define MAXFRAME 1514
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#define MAXFRAMEC 1518
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/* 8390 Network Interface Controller (NIC) page0 register offsets */
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#define CMDR 0x00 /* command register for read & write */
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#define PSTART 0x01 /* page start register for write */
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#define PSTOP 0x02 /* page stop register for write */
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#define BNRY 0x03 /* boundary reg for rd and wr */
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#define TPSR 0x04 /* tx start page start reg for wr */
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#define TXSTAT TPSR
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#define TBCR0 0x05 /* tx byte count 0 reg for wr */
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#define TBCR1 0x06 /* tx byte count 1 reg for wr */
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#define ISR 0x07 /* interrupt status reg for rd and wr */
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#define RSAR0 0x08 /* low byte of remote start addr */
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#define RSAR1 0x09 /* hi byte of remote start addr */
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#define RBCR0 0x0A /* remote byte count reg 0 for wr */
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#define RBCR1 0x0B /* remote byte count reg 1 for wr */
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#define RCR 0x0C /* rx configuration reg for wr */
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#define TCR 0x0D /* tx configuration reg for wr */
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#define DCR 0x0E /* data configuration reg for wr */
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#define IMR 0x0F /* interrupt mask reg for wr */
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/* NIC page 1 register offsets */
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#define PAR0 0x01 /* physical addr reg 0 for rd and wr */
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#define CURRP 0x07 /* current page reg for rd and wr */
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#define MAR0 0x08 /* multicast addr reg 0 for rd and WR */
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/* NIC page 3 register offsets */
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#define RTL9346CR 0x01 /* RTL 9346 command reg */
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#define RTL3 0x06 /* RTL config reg 3 */
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#define NIC_PAGE_SIZE (256)
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/* NIC RAM definitions */
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#define RAMPAGES 0x20 /* Total number of 256-byte RAM pages */
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#define TXSTART 0x40 /* Tx buffer start page - NE2000 mode */
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#define TXPAGES (MAC_TX_BUFFER_COUNT * (MAC_TX_BUFFER_SIZE/NIC_PAGE_SIZE))
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#define RXSTART (TXSTART+TXPAGES) /* Rx buffer start page */
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#define RXSTOP (TXSTART+RAMPAGES-1) /* Last Rx buffer page */
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#define DCRVAL 0x48 /* Value for data config reg */
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/* 8-bit DMA, big-endian, 1 DMA, Normal */
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#define RXPAGES (RXSTOP - RXSTART)
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#define SET_NIC_READ() (TRISD = 0xff)
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#define SET_NIC_WRITE() (TRISD = 0x00)
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#define WRITE_NIC_ADDR(a) NIC_ADDR_IO = a; \
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TRISB = 0xe0
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typedef struct _IEEE_HEADER
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{
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MAC_ADDR DestMACAddr;
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MAC_ADDR SourceMACAddr;
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WORD_VAL Len;
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BYTE LSAPControl[3];
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BYTE OUI[3];
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WORD_VAL Protocol;
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} IEEE_HEADER;
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#define ETHER_IP (0x00)
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#define ETHER_ARP (0x06)
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typedef struct _DATA_BUFFER
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{
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BYTE Index;
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BOOL bFree;
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} DATA_BUFFER;
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static DATA_BUFFER TxBuffers[(TXPAGES*NIC_PAGE_SIZE)/MAC_TX_BUFFER_SIZE];
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#define MAX_DATA_BUFFERS (sizeof(TxBuffers)/sizeof(TxBuffers[0]))
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typedef struct _ETHER_HEADER
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{
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MAC_ADDR DestMACAddr;
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MAC_ADDR SourceMACAddr;
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WORD_VAL Type;
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} ETHER_HEADER;
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typedef struct _NE_RCR
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{
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unsigned int PRX:1;
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unsigned int CRC:1;
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unsigned int FAE:1;
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unsigned int FO:1;
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unsigned int MPA:1;
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unsigned int PHY:1;
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unsigned int DIS:1;
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unsigned int DFR:1;
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} NE_RCR;
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typedef struct _NE_PREAMBLE
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{
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NE_RCR Status;
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BYTE NextPacketPointer;
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WORD ReceivedBytes;
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MAC_ADDR DestMACAddr;
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MAC_ADDR SourceMACAddr;
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WORD_VAL Type;
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} NE_PREAMBLE;
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BYTE NICReadPtr; // Next page that will be used by NIC to load new packet.
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BYTE NICCurrentRdPtr; // Page that is being read...
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BYTE NICCurrentTxBuffer;
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static void NICReset(void);
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static void NICPut(BYTE reg, BYTE val);
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static BYTE NICGet(BYTE reg);
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static void NICSetAddr(WORD addr);
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static void Delay(BYTE val);
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void MACInit(void)
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{
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BYTE i;
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// On Init, all transmit buffers are free.
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for ( i = 0; i < MAX_DATA_BUFFERS; i++ )
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{
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TxBuffers[i].Index = TXSTART + (i * (MAC_TX_BUFFER_SIZE/NIC_PAGE_SIZE));
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TxBuffers[i].bFree = TRUE;
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}
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NICCurrentTxBuffer = 0;
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NICReset();
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DelayMs(2);
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NICPut(NIC_RESET, NICGet(NIC_RESET));
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// mimimum Delay of 1.6 ms
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DelayMs(2);
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// Continue only if reset state is entered.
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if ( (NICGet(ISR) & 0x80) != 0 )
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{
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// Select Page 0
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NICPut(CMDR, 0x21);
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DelayMs(2);
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// Initialize Data Configuration Register
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NICPut(DCR, DCRVAL);
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// Clear Remote Byte Count Registers
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NICPut(RBCR0, 0);
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NICPut(RBCR1, 0);
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// Initialize Receive Configuration Register
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NICPut(RCR, 0x04);
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// Place NIC in LOOPBACK mode 1
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NICPut(TCR, 0x02);
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// Initialize Transmit buffer queue
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NICPut(TPSR, TxBuffers[NICCurrentTxBuffer].Index);
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// Initialize Receive Buffer Ring
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NICPut(PSTART, RXSTART);
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NICPut(PSTOP, RXSTOP);
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NICPut(BNRY, (BYTE)(RXSTOP-1));
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// Initialize Interrupt Mask Register
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// Clear all status bits
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NICPut(ISR, 0xff);
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// No interrupt enabled.
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NICPut(IMR, 0x00);
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// Select Page 1
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NICPut(CMDR, 0x61);
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// Initialize Physical Address Registers
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NICPut(PAR0, MY_MAC_BYTE1);
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NICPut(PAR0+1, MY_MAC_BYTE2);
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NICPut(PAR0+2, MY_MAC_BYTE3);
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NICPut(PAR0+3, MY_MAC_BYTE4);
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NICPut(PAR0+4, MY_MAC_BYTE5);
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NICPut(PAR0+5, MY_MAC_BYTE6);
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// Initialize Multicast registers
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for ( i = 0; i < 8; i++ )
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NICPut(MAR0+i, 0xff);
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// Initialize CURRent pointer
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NICPut(CURRP, RXSTART);
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// Remember current receive page
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NICReadPtr = RXSTART;
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// Page 0, Abort Remote DMA and Activate the transmitter.
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NICPut(CMDR, 0x22);
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// Set Normal Mode
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NICPut(TCR, 0x00);
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}
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}
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BOOL MACIsTxReady(void)
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{
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// NICCurrentTxBuffer always points to free buffer, if there is any.
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// If there is none, NICCurrentTxBuffer will be a in 'Use' state.
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//return TxBuffers[NICCurrentTxBuffer].bFree;
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// Check to see if previous transmission was successful or not.
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return !(NICGet(CMDR) & 0x04);
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}
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void MACPut(BYTE val)
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{
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NICPut(RBCR0, 1);
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NICPut(RBCR1, 0);
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NICPut(CMDR, 0x12);
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NICPut(NIC_DATAPORT, val);
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}
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312 |
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void MACPutArray(BYTE *val, WORD len)
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{
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WORD_VAL t;
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t.Val = len + (len & 1);
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NICPut(ISR, 0x40);
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NICPut(RBCR0, t.v[0]);
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NICPut(RBCR1, t.v[1]);
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NICPut(CMDR, 0x12);
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while ( len-- > 0 )
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NICPut(NIC_DATAPORT, *val++);
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326 |
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// Make sure that DMA is complete.
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len = 255;
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while( len && (NICGet(ISR) & 0x40) == 0 )
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len--;
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331 |
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332 |
}
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334 |
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BYTE MACGet(void)
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{
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NICPut(RBCR0, 1);
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338 |
NICPut(RBCR1, 0);
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NICPut(CMDR, 0x0a);
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return NICGet(NIC_DATAPORT);
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}
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342 |
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343 |
|
344 |
WORD MACGetArray(BYTE *val, WORD len)
|
345 |
{
|
346 |
WORD_VAL t;
|
347 |
|
348 |
t.Val = len;
|
349 |
|
350 |
NICPut(ISR, 0x40);
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351 |
NICPut(RBCR0, t.v[0]);
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352 |
NICPut(RBCR1, t.v[1]);
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NICPut(CMDR, 0x0a);
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354 |
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355 |
while( len-- > 0 )
|
356 |
{
|
357 |
*val++ = NICGet(NIC_DATAPORT);
|
358 |
}
|
359 |
|
360 |
return t.Val;
|
361 |
}
|
362 |
|
363 |
void MACReserveTxBuffer(BUFFER buffer)
|
364 |
{
|
365 |
TxBuffers[buffer].bFree = FALSE;
|
366 |
}
|
367 |
|
368 |
|
369 |
void MACDiscardTx(BUFFER buffer)
|
370 |
{
|
371 |
TxBuffers[buffer].bFree = TRUE;
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372 |
NICCurrentTxBuffer = buffer;
|
373 |
}
|
374 |
|
375 |
void MACDiscardRx(void)
|
376 |
{
|
377 |
BYTE newBoundary;
|
378 |
|
379 |
newBoundary = NICReadPtr - 1;
|
380 |
if ( newBoundary < RXSTART )
|
381 |
newBoundary = RXSTOP - 1;
|
382 |
NICPut(CMDR, 0x20); // Select PAGE 0
|
383 |
NICPut(BNRY, newBoundary);
|
384 |
return;
|
385 |
}
|
386 |
|
387 |
|
388 |
WORD MACGetFreeRxSize(void)
|
389 |
{
|
390 |
BYTE NICWritePtr;
|
391 |
BYTE temp;
|
392 |
WORD_VAL tempVal;
|
393 |
|
394 |
NICPut(CMDR, 0x60);
|
395 |
NICWritePtr = NICGet(CURRP);
|
396 |
NICPut(CMDR, 0x20);
|
397 |
|
398 |
if ( NICWritePtr < NICCurrentRdPtr )
|
399 |
temp = (RXSTOP - NICCurrentRdPtr) + NICWritePtr;
|
400 |
else
|
401 |
temp = NICWritePtr - NICCurrentRdPtr;
|
402 |
|
403 |
temp = RXPAGES - temp;
|
404 |
tempVal.v[1] = temp;
|
405 |
tempVal.v[0] = 0;
|
406 |
return tempVal.Val;
|
407 |
}
|
408 |
|
409 |
|
410 |
BOOL MACIsLinked(void)
|
411 |
{
|
412 |
BYTE_VAL temp;
|
413 |
|
414 |
// Select Page 3
|
415 |
NICPut(CMDR, 0xe0);
|
416 |
|
417 |
// Read CONFIG0.
|
418 |
temp.Val = NICGet(0x03);
|
419 |
|
420 |
// Reset to page 0.
|
421 |
NICPut(CMDR, 0x20);
|
422 |
|
423 |
// Bit 2 "BNC" will be '0' if LINK is established.
|
424 |
return (temp.bits.b2 == 0);
|
425 |
}
|
426 |
|
427 |
BOOL MACGetHeader(MAC_ADDR *remote, BYTE* type)
|
428 |
{
|
429 |
NE_PREAMBLE header;
|
430 |
BYTE NICWritePtr;
|
431 |
WORD_VAL temp;
|
432 |
|
433 |
|
434 |
*type = MAC_UNKNOWN;
|
435 |
|
436 |
// Reset NIC if overrun has occured.
|
437 |
if ( NICGet(ISR) & 0x10 )
|
438 |
{
|
439 |
#if 1
|
440 |
NICPut(CMDR, 0x21);
|
441 |
Delay(0xff);
|
442 |
NICPut(RBCR0, 0);
|
443 |
NICPut(RBCR1, 0);
|
444 |
NICPut(TCR, 0x02);
|
445 |
NICPut(CMDR, 0x20);
|
446 |
MACDiscardRx();
|
447 |
NICPut(ISR, 0xff);
|
448 |
NICPut(TCR, 0x00);
|
449 |
return FALSE;
|
450 |
#else
|
451 |
MACInit();
|
452 |
return FALSE;
|
453 |
#endif
|
454 |
}
|
455 |
|
456 |
NICPut(CMDR, 0x60);
|
457 |
NICWritePtr = NICGet(CURRP);
|
458 |
NICPut(CMDR, 0x20);
|
459 |
|
460 |
if ( NICWritePtr != NICReadPtr )
|
461 |
{
|
462 |
temp.v[1] = NICReadPtr;
|
463 |
temp.v[0] = 0;
|
464 |
NICSetAddr(temp.Val);
|
465 |
|
466 |
MACGetArray((BYTE*)&header, sizeof(header));
|
467 |
|
468 |
// Validate packet length and status.
|
469 |
if ( header.Status.PRX && (header.ReceivedBytes >= MINFRAMEC) && (header.ReceivedBytes <= MAXFRAMEC) )
|
470 |
{
|
471 |
header.Type.Val = swaps(header.Type.Val);
|
472 |
|
473 |
memcpy((void*)remote->v, (void*)header.SourceMACAddr.v, sizeof(*remote));
|
474 |
|
475 |
if ( (header.Type.v[1] == 0x08) && ((header.Type.v[0] == ETHER_IP) || (header.Type.v[0] == ETHER_ARP)) )
|
476 |
*type = header.Type.v[0];
|
477 |
|
478 |
}
|
479 |
|
480 |
NICCurrentRdPtr = NICReadPtr;
|
481 |
NICReadPtr = header.NextPacketPointer;
|
482 |
|
483 |
return TRUE;
|
484 |
}
|
485 |
return FALSE;
|
486 |
|
487 |
}
|
488 |
|
489 |
|
490 |
|
491 |
void MACPutHeader(MAC_ADDR *remote,
|
492 |
BYTE type,
|
493 |
WORD dataLen)
|
494 |
{
|
495 |
WORD_VAL mytemp;
|
496 |
BYTE etherType;
|
497 |
|
498 |
NICPut(ISR, 0x0a);
|
499 |
|
500 |
mytemp.v[1] = TxBuffers[NICCurrentTxBuffer].Index;
|
501 |
mytemp.v[0] = 0;
|
502 |
|
503 |
NICSetAddr(mytemp.Val);
|
504 |
|
505 |
MACPutArray((BYTE*)remote, sizeof(*remote));
|
506 |
|
507 |
MACPut(MY_MAC_BYTE1);
|
508 |
MACPut(MY_MAC_BYTE2);
|
509 |
MACPut(MY_MAC_BYTE3);
|
510 |
MACPut(MY_MAC_BYTE4);
|
511 |
MACPut(MY_MAC_BYTE5);
|
512 |
MACPut(MY_MAC_BYTE6);
|
513 |
|
514 |
if ( type == MAC_IP )
|
515 |
etherType = ETHER_IP;
|
516 |
else
|
517 |
etherType = ETHER_ARP;
|
518 |
|
519 |
MACPut(0x08);
|
520 |
MACPut(etherType);
|
521 |
|
522 |
dataLen += (WORD)sizeof(ETHER_HEADER);
|
523 |
if ( dataLen < MINFRAME ) // 64 ) // NKR 4/23/02
|
524 |
dataLen = 64; // MINFRAME;
|
525 |
mytemp.Val = dataLen;
|
526 |
|
527 |
NICPut(TBCR0, mytemp.v[0]);
|
528 |
NICPut(TBCR1, mytemp.v[1]);
|
529 |
|
530 |
}
|
531 |
|
532 |
void MACFlush(void)
|
533 |
{
|
534 |
BYTE i;
|
535 |
|
536 |
NICPut(TPSR, TxBuffers[NICCurrentTxBuffer].Index);
|
537 |
|
538 |
NICPut(CMDR, 0x24);
|
539 |
|
540 |
// After every transmission, adjust transmit pointer to
|
541 |
// next free transmit buffer.
|
542 |
for ( i = 0; i < MAX_DATA_BUFFERS; i++ )
|
543 |
{
|
544 |
if ( TxBuffers[i].bFree )
|
545 |
{
|
546 |
NICCurrentTxBuffer = i;
|
547 |
return;
|
548 |
}
|
549 |
}
|
550 |
}
|
551 |
|
552 |
static void NICReset(void)
|
553 |
{
|
554 |
SET_NIC_READ();
|
555 |
WRITE_NIC_ADDR(0);
|
556 |
INTCON2_RBPU = 0;
|
557 |
|
558 |
NIC_IOW_IO = 1;
|
559 |
NIC_IOR_IO = 1;
|
560 |
NIC_RESET_IO = 1;
|
561 |
NIC_CTRL_TRIS = 0x00;
|
562 |
|
563 |
// Reset pulse must be at least 800 ns.
|
564 |
Delay10us(1);
|
565 |
|
566 |
NIC_RESET_IO = 0;
|
567 |
}
|
568 |
|
569 |
static void NICPut(BYTE reg, BYTE val)
|
570 |
{
|
571 |
WRITE_NIC_ADDR(reg);
|
572 |
NIC_DATA_IO = val;
|
573 |
SET_NIC_WRITE();
|
574 |
NIC_IOW_IO = 0;
|
575 |
NIC_IOW_IO = 1;
|
576 |
SET_NIC_READ();
|
577 |
}
|
578 |
|
579 |
static BYTE NICGet(BYTE reg)
|
580 |
{
|
581 |
BYTE val;
|
582 |
|
583 |
SET_NIC_READ();
|
584 |
WRITE_NIC_ADDR(reg);
|
585 |
NIC_IOR_IO = 0;
|
586 |
val = NIC_DATA_IO;
|
587 |
NIC_IOR_IO = 1;
|
588 |
return val;
|
589 |
}
|
590 |
|
591 |
|
592 |
static void NICSetAddr(WORD addr)
|
593 |
{
|
594 |
WORD_VAL t;
|
595 |
|
596 |
t.Val = addr;
|
597 |
NICPut(ISR, 0x40);
|
598 |
NICPut(RSAR0, t.v[0]);
|
599 |
NICPut(RSAR1, t.v[1]);
|
600 |
}
|
601 |
|
602 |
static void Delay(BYTE val)
|
603 |
{
|
604 |
WORD_VAL t;
|
605 |
|
606 |
t.v[1] = val;
|
607 |
t.v[0] = 0;
|
608 |
|
609 |
while( t.Val-- > 0);
|
610 |
}
|
611 |
|
612 |
void MACSetRxBuffer(WORD offset)
|
613 |
{
|
614 |
WORD_VAL t;
|
615 |
|
616 |
t.v[1] = NICCurrentRdPtr;
|
617 |
t.v[0] = sizeof(NE_PREAMBLE);
|
618 |
|
619 |
t.Val += offset;
|
620 |
|
621 |
NICSetAddr(t.Val);
|
622 |
}
|
623 |
|
624 |
void MACSetTxBuffer(BUFFER buffer, WORD offset)
|
625 |
{
|
626 |
WORD_VAL t;
|
627 |
|
628 |
NICCurrentTxBuffer = buffer;
|
629 |
t.v[1] = TxBuffers[NICCurrentTxBuffer].Index;
|
630 |
t.v[0] = sizeof(ETHER_HEADER);
|
631 |
|
632 |
t.Val += offset;
|
633 |
|
634 |
NICSetAddr(t.Val);
|
635 |
}
|
636 |
|
637 |
WORD MACGetOffset(void)
|
638 |
{
|
639 |
WORD_VAL t;
|
640 |
|
641 |
t.v[1] = NICGet(RSAR1);
|
642 |
t.v[0] = NICGet(RSAR0);
|
643 |
|
644 |
return t.Val;
|
645 |
}
|
646 |
|